School of Engineering Department of Electronic and Computer Engineering 142 Circuit Emulation of Bio-Inspired Dynamic and Topological Quantum Systems Supervisor: SHAO Qiming / ECE Student: ZHENG Yueyan / CPEG Course: UROP1100, Fall UROP2100, Spring In recent years, non-volatile memory has gained more attention. Compared to volatile memories SRAM, DRAM, non-volatile memories tend to be large, slow to read and write, and consume more energy. Magnetoresistive Random Access Memory (MRAM), on the other hand, offers improvements in all of these areas. As a memory designed to exploit the spin characteristics of electrons, MRAM can use the spin transfer torque (STT) effect to transform stages by applying current, while the voltage-controlled magnetic anisotropy (VCMA) effect can be used to write by applying voltage. This STT-assisted VCMA MRAM is characterized by low power consumption, high switching speed and high density. In terms of stability, it is worth investigating further. Circuit Emulation of Bio-Inspired Dynamic and Topological Quantum Systems Supervisor: SHAO Qiming / ECE Student: ZHENG Wenhan / CPEG Course: UROP2100, Fall This semester, the UROP project involves using multiple instruments to measure unknown devices to get the properties for further analysis. Luckily, there is a certain part designed for TLM measurement to get contact resistance between metal and semiconductor and unit resistance of semiconductor material. The raw resistance data are obtained by remotely-controlled K2636B using python program. The dimensions of test devices are measured by microscope. Then the raw data are processed by using linear approximation. The final approximated data reviled the resistive characteristics of the semiconductor part. However, the measured data of contact resistance contradicts the estimated value from linear approximation. This is partially caused by different metal-semiconductor junction behaviors. Compact Models for Circuit Design Supervisor: SHAO Qiming / ECE Student: TAN Tianshu / SENG Course: UROP1000, Summer The purpose of this thesis is to report the design procedures of a 2-stage operational amplifier with smic180 nm under the requirements of the SSCS student circuit design contest 2022. The amplifier is constructed by 7 MOSFETs, 2 resistors, 1 capacitor, and 1 ideal voltage source. It has attained a 38.42KHz bandwidth, a 103.1° phase margin, and a 37dB gain.